Abstract
In this letter, a gallium nitride (GaN) Doherty power amplifier (DPA) occupying a sub-1-mm2 die area is presented. This small die with compact source network (CSN) and compact load network (CLN) can be fully packaged in a small form factor. Previous solutions have integrated all components into the die with complicated matching and bias networks, resulting in a large and expensive die area. Innovative component merging and compact bond-wire matching in the CSN and CLN have substantially reduced the die size for future massive multiple-input multipleoutput (MIMO) small cells. This proposed DPA was designed and fabricated using a commercial 150-nm GaN/silicon carbide (SiC) high electron mobility transistor (HEMT) process to validate architecture and design methodologies. Experimental results demonstrate that this sub-1-mm2 DPA can deliver saturated powers (Psat) of 38-39 dBm from 4.2 to 4.6 GHz. Measured drain efficiencies (DEs) of the proposed DPA are more than 45 %, from the 6-dB back off power to Psat, over the entire frequency band. Copyright © 2023 IEEE.
Original language | English |
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Pages (from-to) | 61-64 |
Journal | IEEE Solid-State Circuits Letters |
Volume | 6 |
Early online date | Mar 2023 |
DOIs | |
Publication status | Published - 2023 |